2025

🏆 PALFINGER Elevate Scholarship 🏆

Fabian Seiler receives the PALFINGER Elevate Scholarship – a proud moment for our team! Click here for more details.

🎉 We Did It! 🏆

Team UHD CAT is proud to announce that we won 1st place in the Upper Division category of the 1st International AI Hardware Design League (AI-HDL) competition, hosted by The University of Arizona! Click here to learn more.

New Publications!

Excited to share our latest publication in Nature Communications Materials by Gulafshan, H. Hu, D. Raber-Radakovits, L. Vassallo, G. Dailha Marques, J. Aghassi-Hagmann, N. Taherinejad on Realistic behavioral model for ReRAMs capturing non-idealities. Click here to learn more.

Team Workshop at Mosbach

Surrounded by the stunning landscapes of Mosbach, we found the perfect escape to spark new ideas and strengthen our bond. Between creative brainstorming and laughter-filled dinners, the trip brought fresh energy to our team. Check out the link for some of our favorite moments from the workshop here!

Conference highlight from NICE 2025!

One of our PhD students Luke Vassallo recently presented a talk and poster at the Neuro-Inspired Computational Elements (NICE) conference in Heidelberg, sharing his late-breaking results on biologically inspired learning in spiking neural networks. Click to learn more about his work!

Internation Women's Day 2025!

"Empowering women, inspiring futures – celebrating the strength, brilliance, and achievements of women everywhere this International Women's Day!"

New Publications!

We’re excited to share the latest article by Nima A., Gulafshan, Dominik O., and Prof TaheriNejad on PRIM: Hybrid Array-Compressor Multipliers and ApprOchs: A Memristor-Based In-Memory Adaptive Approximate Adder. To dive into the full research! Click here

CCMCC 2025 Conference

Join Us for Cross-disciplinary Conference on Memory Centric Computing (CCMCC) Oct 8 - 10, 2025. Dresden, Germany! Click here to learn more.

New Publications!

Explore our latest publications by C. Simonides, Prof. Taherinejad, and F. Seiler on Approximated 2–Bit Adders for Parallel In–Memristor Computing with a novel Sum–of–Product Architecture, and An Improved Serial IMPLY Adder Algorithm for Efficient Neural Network Applications. Click here to learn more.

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