iMACAW @ DAC 2024

An In-Memory Architectures and Computing Applications Workshop

The iMACAW aims at providing a forum to discuss In-Memory-Computing as an alternative architecture and its applications. We take a cross-technology approach covering works that use SRAM, DRAM, FLASH, RRAM, PCM, MRAM, and FeFET as their memory technology. The workshop features ten renowned speakers from academia and industry, plus a limited selection of best submissions.

Program

The proposed format for the workshop is a full-day workshop featuring:

High-Profile Speakers

Ten renowned scientists from academia and industry present their latest work

Panel Discussions

Two panel discussions on the latest challenges and the future of in-memory computing

Interactive Sessions

A limited selection of submissions will present their recent work to the attendees as elevator pitches and posters

Confirmed Speakers

Next Gen Speakers

The following excellent scientists of next generation have agreed to present their latest research at iMACAW 2024.

Jason Eshraghian

Jason Eshraghian

University of California, Santa Cruz

Event-Driven Computation to Overcome the Pain Points of In-Memory Processing

Shaahin Angizi

Shaahin Angizi

New Jersey Institute of Technology

Revolutionizing Edge Intelligence: From In-Memory to In-Sensor Computing

Priyadarshini Panda

Priyadarshini Panda

Yale University

Optimizing DNN Deployment on IMC Platforms: Co-Design Strategies for Efficiency and Non-Ideality Mitigation In-Memory Computing (IMC) has emerged as a key enabler in efficiently deploying deep neural networks (DNNs), including Convolutional Neural Networks (CNNs) and Vision Transformers (ViTs), on edge devices. This presentation explores co-design methodologies that merge hardware and algorithm insights to optimize these technologies, focusing on the unique challenges posed by IMC architectures, such as analog non-idealities and memory constraints. I will talk about two solutions—TReX and ClipFormer—to address these challenges. TReX enhances Vision Transformers by optimizing attention reuse to balance accuracy, energy, delay, and area trade-offs. ClipFormer, meanwhile, adjusts Key and Value matrices during inference, improving the robustness of pre-trained models against stochastic noise and other non-idealities, without extra hardware or training overhead. Additionally, we will discuss strategies for decoupling candidate training from co-search processes, significantly accelerating the deployment cycle.
Rickard Ewetz

Rickard Ewetz

University of Central Florida

Towards Next-Generation In-Memory Computing Systems using Electronic Design Automation

Call for Submission

Submit an abstract to have a chance at presenting your work at iMACAW

Please submit an extended abstract up to 1 pages using the IEEE conference format to be considered for presenting your work in an elevator pitch as well as a poster and interact with workshop attendees during the poster sessions. DAC will not produce proceedings for workshops, however, the workshop organizers collect the camera-ready submissions and publish them on the workshop website.


Timeline:

Submission deadline: 12/May/2024
Notification of acceptance: 22/May/2024
Final poster submission: 10/June/2024

* All deadlines are until the end of that day, anywhere on earth

Organizers

Feel free to contact us for any questions or concerns

Nima Taherinejad

Nima Taherinejad

Heidelberg University & TU Wien

nima. taherinejad [a t] ziti. uni-heidelberg. de

Nima Taherinejad

Alberto Bosio

École Central de Lyon

alberto.bosio [a t] ec-lyon. fr

Nima Taherinejad

Deliang Fan

John Hopkins University

dfan10 [a t] jhu. edu